E8825A Digital Filter

View Full-Sized Image (37 KB)

E8825A Digital Filter synthesizes a variety of digital communication filters for a DSP designer. It can generate a wide variety of FIR and IIR filters to meet every design specification. The digital filter tool has both floating and fixed point capability. Click on the following links for complete information. Product Information Ordering and Configuration Publications User Support

Product Highlights

• Creates filter coefficients for IIR and FIR in either fixed point or floating point format.
  
• Filter designs include Low Pass, High Pass, Bandpass, Bandstop, Multipass, Multistop, Differentiator, Hilbert transformer, Raised Cosine, and Raised Root Cosine Filters.
  
• Automatically builds fixed or floating-point versions of the designed filter, in the schematic, for easy use in system simulations and Silicon implementation.
  
• Includes an optimizer for coefficient weight control, automatic filter order calculation, and easy, user specified, coefficient download.
  

Product Description

E8825A Digital Filter makes it possible to move easily from filter specification to synthesizable schematic implementation.

View Full-Sized Image (7 KB)

A wide variety of filter structures including Low Pass, High Pass, Bandpass, Bandstop, Multipass, Multistop, Differentiator, Hilbert transformer, Raised Cosine, and Raised Root Cosine Filters are included. Any of these filter types can be easily specified and generated immediately.

Digital filter characteristics such as frequency response, phase response and impulse response can be analyzed graphically.

E8825A Digital Filter also allows you to compare floating point and fixed point filter performance for any user specified bit width.

How To Buy

To request immediate sales assistance - for help choosing the best system; for product configuration and integration details; to request telephone assistance or an on-site demo of the software; or to request a price quotation - click on the following link:

• Agilent EEsof EDA Sales Assistance

Configuration Details

Required

• E8900A Design Environment
  
• E8901A Data Display
  

Related Products

• E8823A Ptolemy Simulator
  
• E8866A HDL Co-Simulation
  

Technical Articles

• Brian L. Berg and David C. Farden, Designing Power- and Area-Efficient Multistage FIR Decimators with Economical Low-Order Filters, ChipCenter Technical Note, December 2001.   PDF Version   (PDF file, 64 KB).   Current issue: ChipCenter.
  
  

Example Files

These examples show the synthesizable filter generation as well as Co-Simulation with HDL:

• /examples/sdfhdlcosim/iir_filter_prj
  
• /examples/DSP/dsp_demos_prj/SYN_FILT
  

top of page     printer-friendly version     email this page