Last month we introduced a new series of application examples that demonstrate specific EM design challenges. Each episode uses an appropriate Agilent EM simulation tool to meet that design challenge. We call them EM Insights and the next 2 episodes in the series are:

Episode 4-Contactor Design In High Volume RF Test Fixtures demonstrates how AMDS can be used to analyze the impact of in-house contactor designs to the overall test performance.

Episode 5-BGA Package Simulation, a 45 mm BGA package is simulated in Momentum for high speed traces and simulated performance is compared against measured data.
 

• ADS Momentum: Globally Changing Port Type

• ADS: Tuning, Sweeping and Optimizing S-Parameter Files

• ADS: Schematic Utility to Find var Definition and Highlight Elements that Use the var

• ADS: Configure the Cadence Allegro Link From a Script

• Genesys: How to Position the Docking Windows

In September, Agilent unveiled SystemVue 2008, a new design platform for Electronic System-level (ESL) design. The new platform cuts physical layer (PHY) design time in half for high-performance communications algorithms and system architectures, for both wireless and aerospace/defense applications. It addresses key physical layer design challenges and unifies baseband, RF, and system-level design flows in a targeted, easy-to-use front end. Unlike other Agilent EDA platforms, this platform emphasizes baseband and signal-processing design, including FPGA, DSP, ASIC, and mixed-signal architectures.

SystemVue 2008 has significant new advantages that will especially benefit applications such as Software-Defined Radio (SDR), Radar, Satellite Communications, and commercial wireless systems based on LTE and WIMAX.

See the world premier of SystemVue 2008 at these regional events in the next month: SDR Forum 2008 (Washington, DC); EuMW 2008 (Netherlands); MilComm 2008 (San Diego, CA).

IC-CAP users can now use Agilent's HiSIM_HV Model Extraction Package. The HiSIM_HV model was developed by Hiroshima University in Japan for both symmetrical HVMOS and asymmetrical LDMOS devices. The HiSIM_HV model addresses commonly observed limitations in simulation convergence, speed, modeling drift region resistance, quasi-saturation effects and self-heating effects. Our new extraction package provides an easy-to-use and customizable methodology for extracting all parameters of the HiSIM_HV model.

Problem: You want to see a signal integrity webcast but your corporate firewall doesn't allow webcast downloads. Solution: We've put 30 popular SI webcasts on CDROMs and you can now order them for free from the Signal Integrity CDROM Webcast Order Page.

To help you get ready to install the next major releases of ADS and IC-CAP, we want to provide you with advanced notice regarding operating system platform changes.

• ADS 2009 will discontinue support for the SuSe Linux SLES9 operating system and instead support SuSe Linux SLES10.
• IC-CAP 2009 will add support for Windows Vista and will continue to support Windows XP. In addition to continuing support for RHEL4, there are tentative plans to add RHEL5.

For ADS, we strongly recommend 64-bit operating systems over 32-bit systems. 64-bit platforms enhance productivity by allowing your EDA software to access significantly larger amounts of memory when needed.

Please review our Operating System Roadmap and detailed product-by-product information.

• GaAs Process: WIN's H2W (PH50-00), H02U_01 and PP25-00; TriQuint's TQPED_220
• SiGe Process: Jazz's SBC18HA & SBC18H2 and IHP's SG25H3
• CMOS process: Jazz's CA18HA & CA13HC, Tower 0.18 um, Chartered 0.13um and TSMC's 65nm, 0.13 um & 0.18 um.
• GaN Process: Cree GaN HEMT & Nitronex

Please contact the foundry directly to requests these PDKs. We are committed to support your success in MMIC and RFIC design flows. See the full list of our foundry partners.

Remove one short line to make this equation correct:

5 + 5 + 1 = 546                                    Solution